1 AMD540CE analog power preliminary publication order number: ds-AMD540CE_f these miniature surface mount mosfets utilize a high cell density trench process to provide low r ds(on) and to ensure minimal power loss and heat dissipation. typical a pplications are dc-dc converters and power management in portable and battery-powered products such as computers, printers, pcmcia cards, cellular and cordless telephones. p & n-channel 40-v (d-s) mosfet ?low r ds(on) provides higher efficiency and extends battery life ? low thermal impedance copper leadframe dpak saves board space ? fast switching speed ? high performance trench technology notes a. surface mounted on 1? x 1? fr4 board. b. pulse width limited by maximum junction temperature v ds (v) r ds(on) m( ? )i d (a) 46 @ v gs = 4.5v 28 36 @ v gs = 10v 33 48 @ v gs = -4.5v -28 38 @ v gs = -10v -33 40 product summary -40 symbol n-channe l p-channe l units v ds 40 -40 v gs 20 -20 continuous drain current a t a =25 o c i d 33 -33 i dm 40 40 i s 30 -30 a power dissipation a t a =25 o c p d 50 50 w t j , t stg -55 to 175 -55 to 175 o c operating junction and storage temperature range continuous source current (diode conduction) a absolute maximum ratings (t a = 25 o c unless otherw ise noted) parame te r pulsed drain current b v gate-source voltage drain-source voltage a parameter symbol maximum units maximum junction-to-ambient a r ja 50 o c/w maximum junction-to-case r jc 3.0 o c/w thermal resistance ratings esd protected 2000v s1 g1 s2 g2 d d 2 p-channel mosfet d 1 g 1 n-channel mosfet s 1 g 2 s 2
2 AMD540CE analog power preliminary publication order number: ds-AMD540CE_f notes a. pulse test: pw <= 3 00us duty cycle <= 2%. b. guaranteed by design, not subject to production testing. analog power (apl) reserves the right to make changes without further notic e to any products herein. apl makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does apl assume any liability arising ou t of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, conseque ntial or incidental damages. ?typical? parameters which may be provided in apl data sheet s and/or specifications can a nd do vary in different appli cations and actual performance may vary over time. all operating parameters , including ?typicals? must be validated for each customer appl ication by customer?s technical experts. apl does not convey any license under its patent rights nor the rights of others. apl products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications int ended to support or sustain life, or for any other application in which the failure of the apl product could create a situation where personal inju ry or death may occur. should buyer purchase or use apl products for any such uninte nded or unauthorized application, buyer shall indemnify and hold a pl and its officers, employees, subsidiari es, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirect ly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that apl was negligent regarding the design or m anufacture of the part. apl is an equal opportunity/affirmative action employer. c h mi n ty p max v gs = v ds , i d = 250 ua n 1 v gs = v ds , i d = -250 ua p -1 v gs = -20 v, v ds = 0 v p 100 v gs = 20 v, v d s = 0 v n 100 v ds = -24 v, v gs = 0 v p -1 v ds = 24 v, v g s = 0 v n 1 v d s = 5 v, v g s = 10 v n 20 v d s = -5 v, v g s = -10 v p -50 v gs = 10 v, i d = 33 a 36 v gs = 4.5 v, i d = 28 a 46 v gs = -10 v, i d = -33 a 38 v gs = -4.5 v, i d = -28 a 48 v d s = 15 v, i d = 33 a n 40 v d s = -15 v, i d = -33 a p 31 n12 p 13 n3.3 p 5.8 n4.5 p12 n 20 p 15 n 9 p 16 n70 p 62 n20 p 46 gate-source charge q gs ga t e - dr a i n ch a r g e q gd forward tranconductance a g fs s total gate charge q g n-channel v ds =15v, v gs =4.5v, i d =33a p-channel v ds =-15v, v gs =-4.5v, i d =-33a nc limits unit specifications (t a = 25 o c unless otherwise noted) na static te s t conditions v symbol parame te r gat e-threshold volt age v gs(th) a gate-body leakage i gss ua i dss zero gat e volt age drain current n p on-state drain current a i d(on) t r t d(off) m ? drain-source on-resistance a r ds(on) switching dynamic turn-on delay time ris e time ns n-chaneel v dd =15v, v gs =10v, i d =1a , r gen =25 ? , p-channel v dd =-15v, v gs =-10v, i d =-1a r gen =15 ? fall-time t f turn-off delay time t d(on)
3 AMD540CE analog power preliminary publication order number: ds-AMD540CE_f typical electrical characteristics (n-channel) transfer characteristics on-resistance vs. junction temperature gate charge capacitance on resistance vs. drain current output characteristics 0 10 20 30 40 50 60 00.511.522.53 v ds - drain-to-source voltage (v) i d - drain current (a ) 3v 4v 6v 10v 0 5 10 15 20 25 30 35 40 45 50 3456789 v gs - gate-to-source voltage (v) i d - drain current (a) t a = -55 o c 25 o c 125 o c 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0 5 10 15 20 25 30 35 40 i d - drain current (a) r ds(on) - on-resistance(ohm ) 10v 4.5v ciss, coss and crss measurement of am4541c die1 nmos 0 100 200 300 400 500 600 700 800 900 0 5 10 15 20 vds(v) capacitance (nc) ciss coss crss 0.6 0.8 1 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) r ds(on) - on-resistance (ohm) (normalized) v gs = 10v 0 2 4 6 8 10 024681012 q g , total gate charge (nc) v gs (v ) v d = 15v i d = 6.5a
4 AMD540CE analog power preliminary publication order number: ds-AMD540CE_f 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 t1, time (sec) p(pk), peak transient power (w) single pulse rqja = 125oc/w ta = 25oc 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, tim e (s e c ) single p ulse 0.01 0.02 0.0 0.1 0.2 d = 0.5 rqj a (t) = r(t) + rqja rqja = 125 o c/w t j - t a = p * r q j a(t) duty cycle, d = t1 / t2 p(pk) t1 t2 typical electrical characteristics (n-channel) figure 11. transient thermal response curve figure 10. single pulse maximum power dissipation threshold voltage source-drain diode forward voltage on-r esistance vs. gate-to-source voltage normalized thermal transien t junction to ambient 0.0001 0.001 0.01 0.1 1 10 100 00.20.40.60.811.2 v sd - source-to-drain voltage (v) i s - source current (a) t a = 125 o c 25 o c 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05 0 246810 v gs - gate-to-source voltage(v) r ds(on) - on-resistance (ohm) 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 -50 -25 0 25 50 75 100 125 150 t j - temperature ( o c) v gs(th) variance (v) i d = 250 a
5 AMD540CE analog power preliminary publication order number: ds-AMD540CE_f typical electrical characteristics (p-channel) transfer characteristics on resistance vs vgs voltage capacitance gate charge on-resistance vs. junction temperature 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 -50 -25 0 25 50 75 100 125 150 t j - junction temperature ( o c) r ds(on) - on-resistance (ohm) (normalized) v gs = - 10v output characteristics 0 10 20 30 40 50 60 00.5 11.522.533.54 v ds (v) i ds drain current (a) 3v 6v through 10v 3.5v 4v 4 .5v 0 10 20 30 40 50 60 0 123456 v gs gate to source voltage (v) i d drain current (a) 25 c 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0 102030405060 i d drain current (a) r ds (on) resistance ( ? ) 4.5v 10v 6v 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 0 5 10 15 2 0 v ds (v) capacitance (pf ) ciss coss crs 0 2 4 6 8 10 0 5 10 15 20 25 30 qg, total gate charge (nc) v gs (v) v d = 10v i d = 10a
6 AMD540CE analog power preliminary publication order number: ds-AMD540CE_f 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 t1, time (sec) p(pk), peak transient power (w ) single pulse rqja = 125c/w ta = 25c 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t1 , tim e (s ec) rqja(t) = r(t) + rqja rqja = 125 o c/w tj - ta = p * rq ja(t) duty cycle, d = t1 / t2 p (p k ) t1 t2 single puls e 0.01 0.02 0.05 0.1 0.2 d = 0.5 typical electrical characteristics (p-channel) source-drain diode forward voltage on-res istance with gate to source voltage threshold voltage figure 10. single pulse maximum power dissipation normalized thermal transien t junction to ambient figure 11. transient thermal response curve 0.0001 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 v sd - source-to-drain voltage (v) i s - source current (a) t a = 125 o c 25 o c 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 -50 -25 0 25 50 75 100 125 150 t j - temperature ( o c) v gs(th) variance (v) i d = -250 a 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0246810 v gs gate to source voltage(v) r ds (on) resistance ( ? ) id=10a
7 AMD540CE analog power preliminary publication order number: ds-AMD540CE_f
|
